Electricity is among the most convenient and widely used energy form. With the ever increasing rate of energy use, there is increasing attention on energy efficiency, especially on increasing the power conversion efficiency of the SMPS. As it is often the input power supply of many appliances, the SMPS contributes a large part to the appliance's overall efficiency, which can only be lower than that of the SMPS.
FIG. 1 through 4 are schematic depictions of four prior art single-transistor, single-stage high-frequency SMPS topologies. Their implementations are limited to low-power ac-dc power conversion. The simplest topology of FIG. 1 contains an active clamp network 101. It has significant drawbacks when used in low-voltage high-current output applications, due to the need of large output capacitance for energy storage, the complexity of clamp network control and associated minimal amount of loss. The drawbacks in topology of FIG. 2 are present in added size and cost of the two rectifier diodes and their contribution to the clamp network's losses. The drawbacks in topology of FIG. 3 are present as results of the additional half conversion stage, the control complexity of achieving unity power factor and the large current stress and related loss in the power switch during turn-on resulting from stored energies in the inductor and transformer. The topology in FIG. 4 suffers from issues such as low efficiency, the addition of two rectifiers which increases converter loss, size and cost, and similar problems associated with the power switch as described for the FIG. 3 topology.
To meet the many high-end power management requirements, a modern SMPS needs to be highly efficient and contains advanced technologies such as interleaving, soft-switching, synchronous rectification, output management and reduced power conversion stages. In contrast, the performance of single-stage SMPS with prior art technologies has not seen a dramatic increase, making their commercialization difficult.